Various types of logic circuits are used for high-speed operations. One of the more common types is a complex logic circuit using a transmission gate formed using CMOS fabrication methods. Recently, dual-rail methods for high-speed operation have been used, but dual-rail methods may have the disadvantage that signal routing and chip area increase as the complementary signal is added. On the other hand, a single-rail method may provide that signal routing and chip area are reduced, but an inverting circuit may be required to generate complementary signals, adversely affecting high-speed operation and/or power consumption.
FIG. 1 illustrates a conventional exclusive-OR (XOR) circuit according to a single-rail method using a transmission gate and a CMOS transistor, and FIG. 2 illustrates a conventional exclusive-NOR (XNOR) circuit according to a signal-rail method using a transmission gate and a CMOS transistor.
Referring to FIG. 1, the conventional exclusive-OR circuit includes PMOS transistors P11 and P12, NMOS transistors N11 and N12, a transmission gate 13, and inverters 11, 12 and 14. Referring to FIG. 2, the conventional exclusive-NOR circuit includes PMOS transistors P21 and P22, NMOS transistors N21 and N22, a transmission gate 23, and inverters 21, 22 and 24.
In the conventional exclusive-OR circuit and exclusive-NOR circuit, the inverters 11, 12, 21 and 22 are used to generate complementary signals of the two input signals A and B, as shown in FIGS. 1 and 2. Because the transmission gate, the PMOS transistors, and the NMOS transistors operate after the complementary signals are generated by the inverters 11, 12, 21 and 22, a delay may occur while generating the complementary signals, and operation speed may be reduced.